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ICS
2007
Tsinghua U.
13 years 11 months ago
Cooperative cache partitioning for chip multiprocessors
This paper presents Cooperative Cache Partitioning (CCP) to allocate cache resources among threads concurrently running on CMPs. Unlike cache partitioning schemes that use a singl...
Jichuan Chang, Gurindar S. Sohi
IPPS
2006
IEEE
13 years 11 months ago
Helper thread prefetching for loosely-coupled multiprocessor systems
This paper presents a helper thread prefetching scheme that is designed to work on loosely-coupled processors, such as in a standard chip multi-processor (CMP) system and in an in...
Changhee Jung, Daeseob Lim, Jaejin Lee, Yan Solihi...
CODES
2005
IEEE
13 years 7 months ago
FIDES: an advanced chip multiprocessor platform for secure next generation mobile terminals
We propose a secure platform on a chip multiprocessor, known as FIDES, in order to enable next generation mobile terminals to execute downloaded native applications for Linux. Its...
Hiroaki Inoue, Akihisa Ikeno, Masaki Kondo, Junji ...
DSN
2011
IEEE
12 years 5 months ago
Transparent dynamic binding with fault-tolerant cache coherence protocol for chip multiprocessors
—Aggressive technology scaling causes chip multiprocessors increasingly error-prone. Core-level faulttolerant approaches bind two cores to implement redundant execution and error...
Shuchang Shan, Yu Hu, Xiaowei Li
CDES
2008
166views Hardware» more  CDES 2008»
13 years 7 months ago
Scalable Directory Organization for Tiled CMP Architectures
Although directory-based cache coherence protocols are the best choice when designing chip multiprocessor architectures (CMPs) with tens of processor cores on chip, the memory ove...
Alberto Ros, Manuel E. Acacio, José M. Garc...