21 search results - page 1 / 5 » A low voltage CMOS multiplier for high frequency equalizatio... |
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
- This paper describes the design of a low power
ISVLSI
2007
IEEE
13 years 11 months ago
2007
IEEE
This paper presents a two-stage CMOS differential voltage-controlled ring oscillator (VCO). The VCO is intended to operate as a frequency synthesizer in a PLL to generate local os...
GLVLSI
2003
IEEE
13 years 10 months ago
2003
IEEE
With scaling down to deep submicron and nanometer technologies, noise immunity is becoming a metric of the same importance as power, speed, and area. Smaller feature sizes, low vo...
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
—A low-power high-SFDR CMOS direct digital frequency synthesizer (DDFS) is presented. Several design techniques, including a cell-based lookup table, a power aware parameters sel...
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
A high-to-low switching DC-DC converter that operates at input supply voltages up to two times as high as the maximum voltage permitted in a nanometer CMOS technology is proposed ...