45 search results - page 2 / 9 » A low-area interconnect architecture for chip multiprocessor... |
DATE
2004
IEEE
13 years 9 months ago
2004
IEEE
The MultiNoC system implements a programmable onchip multiprocessing platform built on top of an efficient, low area overhead intra-chip interconnection scheme. The employed inter...
ASAP
2003
IEEE
13 years 10 months ago
2003
IEEE
On-chip implementation of multiprocessor systems requires the planarization of the interconnect network onto the silicon floorplan. Manual floorplanning approaches will become i...
HPCC
2009
Springer
13 years 10 months ago
2009
Springer
—The potential for destructive interference between running processes is increased as Chip Multiprocessors (CMPs) share more on-chip resources. We believe that understanding the ...
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
Interconnect networks play a critical role in shared memory multiprocessor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the pac...
CODES
2004
IEEE
13 years 9 months ago
2004
IEEE
In this paper, we present an approach for automatic synthesis of System on Chip (SoC) multiprocessor architectures for applications expressed as process networks. Our approach is ...