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SLIP
2009
ACM
14 years 15 days ago
Integrated interlayer via planning and pin assignment for 3D ICs
As technology advances, 3D ICs are introduced for alleviating the interconnect problem coming with shrinking feature size and increasing integration density. In 3D ICs, one of the...
Xu He, Sheqin Dong, Xianlong Hong, Satoshi Goto
TPDS
1998
129views more  TPDS 1998»
13 years 5 months ago
The Offset Cube: A Three-Dimensional Multicomputer Network Topology Using Through-Wafer Optics
—Three-dimensional packaging technologies are critical for enabling ultra-compact, massively parallel processors (MPPs) for embedded applications. Through-wafer optical interconn...
W. Stephen Lacy, José Cruz-Rivera, D. Scott...
ICCAD
2004
IEEE
138views Hardware» more  ICCAD 2004»
14 years 2 months ago
A thermal-driven floorplanning algorithm for 3D ICs
As the technology progresses, interconnect delays have become bottlenecks of chip performance. Three dimensional (3D) integrated circuits are proposed as one way to address this p...
Jason Cong, Jie Wei, Yan Zhang
INFOCOM
2009
IEEE
14 years 19 days ago
FiConn: Using Backup Port for Server Interconnection in Data Centers
Abstract— The goal of data center networking is to interconnect a large number of server machines with low equipment cost, high and balanced network capacity, and robustness to l...
Dan Li, Chuanxiong Guo, Haitao Wu, Kun Tan, Songwu...
NOCS
2009
IEEE
14 years 21 days ago
Networks-on-chip in emerging interconnect paradigms: Advantages and challenges
Communication plays a crucial role in the design and performance of multi-core systems-on-chip (SoCs). Networks-on-chip (NoCs) have been proposed as a promising solution to simpli...
Luca P. Carloni, Partha Pande, Yuan Xie