17 search results - page 2 / 4 » A new look at the conditions for the synthesis of speed-inde... |
ICCAD
2007
IEEE
13 years 11 months ago
2007
IEEE
—In latency-insensitive design shell modules are used to encapsulate system components (pearls) in order to interface them with the given latency-insensitive protocol and dynamic...
ICCAD
2003
IEEE
14 years 2 months ago
2003
IEEE
A new technique for the logic synthesis of asynchronous circuits is presented. It is based on the structural theory of Petri nets and integer linear programming. The technique is ...
TACAS
2005
Springer
13 years 10 months ago
2005
Springer
Abstract. The automatic synthesis of programs from their specifications has been a dream of many researchers for decades. If we restrict to open finite-state reactive systems, th...
ITC
1997
IEEE
13 years 9 months ago
1997
IEEE
Tri-state buses and pass transistor logic are used in many complex applications to achieve high performance and small area. Such circuits often contain logic requiring one-hot sig...
TCAD
1998
13 years 5 months ago
1998
Abstract—We examine the implications of a new hazard-free combinational logic synthesis method [1], which generates multiplexor-based networks from binary decision diagrams (BDDs...