40 search results - page 8 / 8 » A performance evaluation of cache injection in bus-based sha... |
ASPLOS
2010
ACM
13 years 8 months ago
2010
ACM
Cores in a chip-multiprocessor (CMP) system share multiple hardware resources in the memory subsystem. If resource sharing is unfair, some applications can be delayed significantl...
ASPLOS
1998
ACM
13 years 9 months ago
1998
ACM
Thread-level speculation is a technique that enables parallel execution of sequential applications on a multiprocessor. This paper describes the complete implementation of the sup...
IPPS
2005
IEEE
13 years 10 months ago
2005
IEEE
With the latest high-end computing nodes combining shared-memory multiprocessing with hardware multithreading, new scheduling policies are necessary for workloads consisting of mu...
IPPS
1998
IEEE
13 years 9 months ago
1998
IEEE
We have built an eight node SMP cluster called COMPaS (Cluster Of Multi-Processor Systems), each node of which is a quadprocessor Pentium Pro PC. We have designed and implemented a...
IPPS
2006
IEEE
13 years 10 months ago
2006
IEEE
Due to shared cache contentions and interconnect delays, data prefetching is more critical in alleviating penalties from increasing memory latencies and demands on Chip-Multiproce...