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» A robust detailed placement for mixed-size IC designs
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DAC
2008
ACM
13 years 7 months ago
Keeping hot chips cool: are IC thermal problems hot air?
level of accuracy in IC package abstraction (compact models) to ensure robust thermal design. An overarching goal must be to reduce power consumption per function through smart pro...
Ruchir Puri, Devadas Varma, Darvin Edwards, Alan J...
ASPDAC
2008
ACM
104views Hardware» more  ASPDAC 2008»
13 years 7 months ago
Low power clock buffer planning methodology in F-D placement for large scale circuit design
Traditionally, clock network layout is performed after cell placement. Such methodology is facing a serious problem in nanometer IC designs where people tend to use huge clock buff...
Yanfeng Wang, Qiang Zhou, Yici Cai, Jiang Hu, Xian...
VLSID
2010
IEEE
190views VLSI» more  VLSID 2010»
13 years 4 months ago
Rethinking Threshold Voltage Assignment in 3D Multicore Designs
Due to the inherent nature of heat flow in 3D integrated circuits, stacked dies exhibit a wide range of thermal characteristics. The strong dependence of leakage with temperature...
Koushik Chakraborty, Sanghamitra Roy
DSN
2011
IEEE
12 years 5 months ago
Resource and virtualization costs up in the cloud: Models and design choices
—Virtualization offers the potential for cost-effective service provisioning. For service providers who make significant investments in new virtualized data centers in support of...
Daniel Gmach, Jerry Rolia, Ludmila Cherkasova
FTEDA
2006
137views more  FTEDA 2006»
13 years 5 months ago
Statistical Performance Modeling and Optimization
As IC technologies scale to finer feature sizes, it becomes increasingly difficult to control the relative process variations. The increasing fluctuations in manufacturing process...
Xin Li, Jiayong Le, Lawrence T. Pileggi