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ASPDAC
2010
ACM
135views Hardware» more  ASPDAC 2010»
13 years 4 months ago
Statistical timing verification for transparently latched circuits through structural graph traversal
Level-sensitive transparent latches are widely used in high-performance sequential circuit designs. Under process variations, the timing of a transparently latched circuit will ada...
Xingliang Yuan, Jia Wang
ISCA
2002
IEEE
174views Hardware» more  ISCA 2002»
13 years 5 months ago
Efficient Task Partitioning Algorithms for Distributed Shared Memory Systems
In this paper, we consider the tree task graphs which arise from many important programming paradigms such as divide and conquer, branch and bound etc., and the linear task-graphs...
Sibabrata Ray, Hong Jiang
PODC
2005
ACM
13 years 11 months ago
Proof labeling schemes
The problem of verifying a Minimum Spanning Tree (MST) was introduced by Tarjan in a sequential setting. Given a graph and a tree that spans it, the algorithm is required to check...
Amos Korman, Shay Kutten, David Peleg
KR
2004
Springer
13 years 11 months ago
Planning Graphs and Knowledge Compilation
One of the major advances in classical planning has been the development of Graphplan. Graphplan builds a layered structure called the planning graph, and then searches this struc...
Hector Geffner
PODC
2005
ACM
13 years 11 months ago
Primal-dual based distributed algorithms for vertex cover with semi-hard capacities
In this paper we consider the weighted, capacitated vertex cover problem with hard capacities (capVC). Here, we are given an undirected graph G = (V, E), non-negative vertex weigh...
Fabrizio Grandoni, Jochen Könemann, Alessandr...