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VLSID
2008
IEEE
142views VLSI» more  VLSID 2008»
13 years 11 months ago
Incorporating PVT Variations in System-Level Power Exploration of On-Chip Communication Architectures
With the shift towards deep sub-micron (DSM) technologies, the increase in leakage power and the adoption of poweraware design methodologies have resulted in potentially significa...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
DATE
2008
IEEE
116views Hardware» more  DATE 2008»
13 years 12 months ago
A Virtual Prototype for Bluetooth over Ultra Wide Band System Level Design
The industry is merging two different Wireless Personal Area Networks (WPAN) technologies: Bluetooth (BT) and WiMedia Ultra Wide Band (UWB), into a single BT over UWB (BToUWB) spe...
Alexandre Lewicki, Javier del Prado Pavon, Jacky T...
DAC
1997
ACM
13 years 9 months ago
Methodology for Behavioral Synthesis-Based Algorithm-Level Design Space Exploration: DCT Case Study
: Numerous fast algorithms for the Discrete Cosine Transform DCT have been proposed. Until recently, it has been di cult to compare di erent DCT algorithms and select one which i...
Miodrag Potkonjak, Kyosun Kim, Ramesh Karri
FDL
2004
IEEE
13 years 9 months ago
SystemC and OCAPI-xl Based System-Level Design for Reconfigurable Systems-on-Chip
Reconfigurability is becoming an important part of System-on-Chip (SoC) design to cope with the increasing demands for simultaneous flexibility and computational power. Current ha...
Kari Tiensyrjä, Miroslav Cupák, Kostas...
CODES
2002
IEEE
13 years 10 months ago
Metrics for design space exploration of heterogeneous multiprocessor embedded systems
This paper considers the problem of designing heterogeneous multiprocessor embedded systems. The focus is on a step of the design flow: the definition of innovative metrics for th...
Donatella Sciuto, Fabio Salice, Luigi Pomante, Wil...