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» A systematic approach to the test of combined HW SW systems
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DATE
2005
IEEE
122views Hardware» more  DATE 2005»
13 years 10 months ago
Systematic Transaction Level Modeling of Embedded Systems with SystemC
This paper gives an overview of a transaction level modeling (TLM) design flow for straightforward embedded system design with SystemC. The goal is to systematically develop both...
Wolfgang Klingauf
FPL
2006
Springer
158views Hardware» more  FPL 2006»
13 years 8 months ago
Placing Functionality in Fault-Tolerant Hardware/Software Reconfigurable Networks
A novel framework shows the potential of FPGA-based systems for increasing fault-tolerance and flexibility by placing functionality onto free hardware (HW) or software (SW) resour...
Thilo Streichert
DATE
2008
IEEE
103views Hardware» more  DATE 2008»
13 years 11 months ago
A Mutation Model for the SystemC TLM 2.0 Communication Interfaces
Mutation analysis is a widely-adopted strategy in software testing with two main purposes: measuring the quality of test suites, and identifying redundant code in programs. Simila...
Nicola Bombieri, Franco Fummi, Graziano Pravadelli
FPT
2005
IEEE
198views Hardware» more  FPT 2005»
13 years 10 months ago
From TLM to FPGA: Rapid Prototyping with SystemC and Transaction Level Modeling
We describe a communication-centric design methodology with SystemC that allows for efficient FPGA prototype generation of transaction level models (TLM). Using a framework compr...
Wolfgang Klingauf, Robert Günzel
DATE
2010
IEEE
132views Hardware» more  DATE 2010»
13 years 10 months ago
A systematic approach to the test of combined HW/SW systems
Abstract—Today we can identify a big gap between requirement specification and the generation of test environments. This article extends the Classification Tree Method for Embe...
Alexander Krupp, Wolfgang Müller 0003