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VLSID
1996
IEEE
130views VLSI» more  VLSID 1996»
13 years 9 months ago
A systolic architecture for LMS adaptive filtering with minimal adaptation delay
Existing systolic architectures for the LMS algorithm with delayed coeficient adaptation have large adaptation delay and hence degraded convergence behaviour. This paper presents ...
S. Ramanathan, V. Visvanathan
VLSID
1997
IEEE
106views VLSI» more  VLSID 1997»
13 years 9 months ago
Low-Power Configurable Processor Array for DLMS Adaptive Filtering
I n this paper, we first present a pipelined delayed least mean square (DLMS) adaptive filter architecture whose power dissipation meets a specified budget. This low-power archite...
S. Ramanathan, V. Visvanathan