4 search results - page 1 / 1 » ACCESS: Smart scheduling for asymmetric cache CMPs |
HPCA
2011
IEEE
12 years 8 months ago
2011
IEEE
In current Chip-multiprocessors (CMPs), a significant portion of the die is consumed by the last-level cache. Until recently, the balance of cache and core space has been primari...
ISCA
2011
IEEE
12 years 8 months ago
2011
IEEE
Emerging memory technologies such as STT-RAM, PCRAM, and resistive RAM are being explored as potential replacements to existing on-chip caches or main memories for future multi-co...
HPCA
2009
IEEE
14 years 5 months ago
2009
IEEE
The number of functional errors escaping design verification and being released into final silicon is growing, due to the increasing complexity and shrinking production schedules ...
ASPLOS
2012
ACM
12 years 9 days ago
2012
ACM
The rise of multi-core processors has shifted performance efforts towards parallel programs. However, single-threaded code, whether from legacy programs or ones difficult to para...