5 search results - page 1 / 1 » ASR: Adaptive Selective Replication for CMP Caches |
MICRO
2006
IEEE
13 years 11 months ago
2006
IEEE
The large working sets of commercial and scientific workloads stress the L2 caches of Chip Multiprocessors (CMPs). Some CMPs use a shared L2 cache to maximize the on-chip cache c...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
Abstract—Chip multiprocessors (CMPs) present a unique scenario for software data prefetching with subtle tradeoffs between memory bandwidth and performance. In a shared L2 based ...
ADBIS
2006
Springer
13 years 11 months ago
2006
Springer
Database caching supports declarative query processing close to the application. Using a full-fledged DBMS as cache manager, it enables the evaluation of specific project-select-...
INFOCOM
2000
IEEE
13 years 9 months ago
2000
IEEE
—Efficient server selection algorithms reduce retrieval time for objects replicated on different servers and are an important component of Internet cache architectures. This pap...
MICRO
2008
IEEE
13 years 11 months ago
2008
IEEE
With the recent design shift towards increasing the number of processing elements in a chip, high-bandwidth support in on-chip interconnect is essential for low-latency communicat...