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» Acceleration techniques for dynamic vector compaction
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ICCAD
1995
IEEE
170views Hardware» more  ICCAD 1995»
13 years 8 months ago
Acceleration techniques for dynamic vector compaction
: We present several techniques for accelerating dynamic vector compaction for combinational and sequential circuits. A key feature of all our techniques is that they significantly...
Anand Raghunathan, Srimat T. Chakradhar
GRAPHITE
2007
ACM
13 years 8 months ago
Compact and efficient generation of radiance transfer for dynamically articulated characters
We present a data-driven technique for generating the precomputed radiance transfer vectors of an animated character as a function of its joint angles. We learn a linear model for...
Derek Nowrouzezahrai, Patricio D. Simari, Evangelo...
DAC
1997
ACM
13 years 9 months ago
Hierarchical Sequence Compaction for Power Estimation
- This paper presents an effective technique for compacting a large sequence of input vectors into a much smaller one such that when the two sequences are applied to any circuit, t...
Radu Marculescu, Diana Marculescu, Massoud Pedram
DATE
1999
IEEE
120views Hardware» more  DATE 1999»
13 years 9 months ago
FreezeFrame: Compact Test Generation Using a Frozen Clock Strategy
Test application time is an important factor in the overall cost of VLSI chip testing. We present a new ATPG approach for generating compact test sequences for sequential circuits...
Yanti Santoso, Matthew C. Merten, Elizabeth M. Rud...
ASPLOS
2012
ACM
12 years 17 days ago
Aikido: accelerating shared data dynamic analyses
Despite a burgeoning demand for parallel programs, the tools available to developers working on shared-memory multicore processors have lagged behind. One reason for this is the l...
Marek Olszewski, Qin Zhao, David Koh, Jason Ansel,...