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» Accurate and scalable reliability analysis of logic circuits
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DATE
2007
IEEE
102views Hardware» more  DATE 2007»
13 years 11 months ago
Accurate and scalable reliability analysis of logic circuits
Reliability of logic circuits is emerging as an important concern that may limit the benefits of continued scaling of process technology and the emergence of future technology al...
Mihir R. Choudhury, Kartik Mohanram
DATE
2005
IEEE
153views Hardware» more  DATE 2005»
13 years 10 months ago
Accurate Reliability Evaluation and Enhancement via Probabilistic Transfer Matrices
Soft errors are an increasingly serious problem for logic circuits. To estimate the effects of soft errors on such circuits, we develop a general computational framework based on ...
Smita Krishnaswamy, George F. Viamontes, Igor L. M...
DATE
2006
IEEE
120views Hardware» more  DATE 2006»
13 years 11 months ago
Soft delay error analysis in logic circuits
— In this paper, we present an analysis methodology to compute circuit node sensitivity due to charged particle induced delay (timing) errors, Soft Delay Errors (SDE). We define...
Balkaran S. Gill, Christos A. Papachristou, Franci...
VLSID
2007
IEEE
127views VLSI» more  VLSID 2007»
14 years 5 months ago
Scalable techniques and tools for reliability analysis of large circuits
Debayan Bhaduri, Sandeep K. Shukla, Paul Graham, M...
ISQED
2006
IEEE
155views Hardware» more  ISQED 2006»
13 years 11 months ago
FASER: Fast Analysis of Soft Error Susceptibility for Cell-Based Designs
This paper is concerned with statically analyzing the susceptibility of arbitrary combinational circuits to single event upsets that are becoming a significant concern for reliabi...
Bin Zhang, Wei-Shen Wang, Michael Orshansky