140 search results - page 3 / 28 » Activity-sensitive architectural power analysis for the cont... |
WWW
2004
ACM
14 years 6 months ago
2004
ACM
In this paper, we present a localized Shortest Path Tree (SPT) based algorithm for constructing a sub-network with the minimum-energy property for a given wireless ad hoc network....
CORR
2007
Springer
13 years 5 months ago
2007
Springer
This paper presents a new dynamic power management architecture of a System on Chip. The Power State Machine describing the status of the core follows the recommendations of the A...
ISSS
2000
IEEE
13 years 10 months ago
2000
IEEE
Timing and power consumption of embedded systems are state and input data dependent. Formal analysis of such dependencies leads to intervals rather than single values. These inter...
DAC
2004
ACM
14 years 6 months ago
2004
ACM
Current Static Timing Analysis (STA) techniques allow one to verify the timing of a circuit at different process corners which only consider cases where all the supplies are low o...
FCCM
2005
IEEE
13 years 11 months ago
2005
IEEE
Although researchers have presented individual techniques to efficiently utilize the Peripheral Component Interconnect (PCI) bus, their contributions fail to provide a direct path...