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» Adaptive and Speculative Slack Simulations of CMPs on CMPs
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MICRO
2010
IEEE
128views Hardware» more  MICRO 2010»
13 years 2 months ago
Adaptive and Speculative Slack Simulations of CMPs on CMPs
Current trends signal an imminent crisis in the simulation of future CMPs (Chip MultiProcessors). Future micro-architectures will offer more and more thread contexts to execute pa...
Jianwei Chen, Lakshmi Kumar Dabbiru, Daniel Wong, ...
ICPP
2009
IEEE
13 years 11 months ago
Exploiting Simulation Slack to Improve Parallel Simulation Speed
Parallel simulation is a technique to accelerate microarchitecture simulation of CMPs by exploiting the inherent parallelism of CMPs. In this paper, we explore the simulation para...
Jianwei Chen, Murali Annavaram, Michel Dubois
ISCA
2000
IEEE
134views Hardware» more  ISCA 2000»
13 years 9 months ago
Architectural support for scalable speculative parallelization in shared-memory multiprocessors
Speculative parallelization aggressively executes in parallel codes that cannot be fully parallelized by the compiler. Past proposals of hardware schemes have mostly focused on si...
Marcelo H. Cintra, José F. Martínez,...
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
13 years 11 months ago
ASR: Adaptive Selective Replication for CMP Caches
The large working sets of commercial and scientific workloads stress the L2 caches of Chip Multiprocessors (CMPs). Some CMPs use a shared L2 cache to maximize the on-chip cache c...
Bradford M. Beckmann, Michael R. Marty, David A. W...
MICRO
2010
IEEE
130views Hardware» more  MICRO 2010»
13 years 2 months ago
Pseudo-Circuit: Accelerating Communication for On-Chip Interconnection Networks
As the number of cores on a single chip increases with more recent technologies, a packet-switched on-chip interconnection network has become a de facto communication paradigm for ...
Minseon Ahn, Eun Jung Kim