Sciweavers

173 search results - page 1 / 35
» Adaptive execution techniques for SMT multiprocessor archite...
Sort
View
PPOPP
2005
ACM
13 years 11 months ago
Adaptive execution techniques for SMT multiprocessor architectures
Changhee Jung, Daeseob Lim, Jaejin Lee, Sangyong H...
HPCA
2012
IEEE
12 years 26 days ago
BulkSMT: Designing SMT processors for atomic-block execution
Multiprocessor architectures that continuously execute atomic blocks (or chunks) of instructions can improve performance and software productivity. However, all of the prior propo...
Xuehai Qian, Benjamin Sahelices, Josep Torrellas
PPOPP
2003
ACM
13 years 10 months ago
Improving server software support for simultaneous multithreaded processors
Simultaneous multithreading (SMT) represents a fundamental shift in processor capability. SMT's ability to execute multiple threads simultaneously within a single CPU offers ...
Luke McDowell, Susan J. Eggers, Steven D. Gribble
IEEEPACT
2006
IEEE
13 years 11 months ago
Adaptive reorder buffers for SMT processors
In SMT processors, the complex interplay between private and shared datapath resources needs to be considered in order to realize the full performance potential. In this paper, we...
Joseph J. Sharkey, Deniz Balkan, Dmitry Ponomarev
MASCOTS
2007
13 years 6 months ago
Adaptive Sampling for Efficient MPSoC Architecture Simulation
—Modern micro-architecture simulators are many orders of magnitude slower than the hardware they simulate. The use of multiprocessor architectures for supporting future mobile an...
Melhem Tawk, Khaled Z. Ibrahim, Smaïl Niar