8 search results - page 1 / 2 » Adder and Comparator Synthesis with Exclusive-OR Transform o... |
VLSID
1997
IEEE
13 years 9 months ago
1997
IEEE
An exclusive-OR transform of input variables significantly reduces the size of the PLA implementation for adder and comparator circuits. For n bit adder circuits, the size of PLA ...
ISCAS
2008
IEEE
13 years 11 months ago
2008
IEEE
— This paper presents models for estimating the transition activity of signals at the output of adders in Field Programmable Gate Arrays (FPGAs), given only word-level measures o...
ICCAD
2003
IEEE
14 years 2 months ago
2003
IEEE
Reversible logic has applications in quantum computing, low power CMOS, nanotechnology, optical computing, and DNA computing. The most common reversible gates are the Toffoli gate...
DFT
2006
IEEE
13 years 11 months ago
2006
IEEE
This paper presents a procedure for Synthesis of LINear test pattern Generators called SLING. SLING can synthesize linear test pattern generators that satisfy constraints on area,...
DAC
2006
ACM
14 years 6 months ago
2006
ACM
In this paper we propose a new communication synthesis approach targeting systems with sequential communication media (SCM). Since SCMs require that the reading sequence and writi...