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» Address generation for nanowire decoders
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GLVLSI
2007
IEEE
153views VLSI» more  GLVLSI 2007»
13 years 6 months ago
Address generation for nanowire decoders
Nanoscale crossbars built from nanowires can form high density memories and programmable logic devices. To integrate such nanoscale devices with other circuits, nanowire decoders ...
Jia Wang, Ming-Yang Kao, Hai Zhou
ISVLSI
2005
IEEE
108views VLSI» more  ISVLSI 2005»
13 years 10 months ago
Analysis of a Mask-Based Nanowire Decoder
A key challenge facing nanotechnologies will be controlling nanoarrays, two orthogonal sets of nanowires that form a crossbar, using a moderate number of mesoscale wires. Three me...
Eric Rachlin, John E. Savage, Benjamin Gojman
DAC
2009
ACM
14 years 5 months ago
Decoding nanowire arrays fabricated with the multi-spacer patterning technique
Silicon nanowires are a promising solution to address the increasing challenges of fabrication and design at the future nodes of the Complementary Metal-Oxide-Semiconductor (CMOS)...
M. Haykel Ben Jamaa, Yusuf Leblebici, Giovanni De ...
ICCAD
2006
IEEE
100views Hardware» more  ICCAD 2006»
14 years 1 months ago
Nanowire addressing with randomized-contact decoders
— Methods for assembling crossbars from nanowires (NWs) have been designed and implemented. Methods for controlling individual NWs within a crossbar have also been proposed, but ...
Eric Rachlin, John E. Savage
TC
2008
13 years 4 months ago
Analysis of Mask-Based Nanowire Decoders
Stochastically assembled nanoscale architectures have the potential to achieve device densities 100 times greater than today's CMOS. A key challenge facing nanotechnologies is...
Eric Rachlin, John E. Savage