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» Algorithms and DSP implementation of H.264 AVC
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APCCAS
2006
IEEE
224views Hardware» more  APCCAS 2006»
13 years 11 months ago
A High-Performance VLSI Architecture for Intra Prediction and Mode Decision in H.264/AVC Video Encoding
We propose a high-performance hardware accelerator for intra prediction and mode decision in H.264/AVC video encoding. We use two intra prediction units to increase the performance...
Yu-Chien Kao, Huang-Chih Kuo, Yin-Tzu Lin, Chia-We...
VLSISP
2008
123views more  VLSISP 2008»
13 years 4 months ago
Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
Bingfeng Mei, Bjorn De Sutter, Tom Vander Aa, M. W...
PSIVT
2009
Springer
116views Multimedia» more  PSIVT 2009»
13 years 11 months ago
Video Coding Using Spatially Varying Transform
In this paper, we propose a novel algorithm, named as Spatially Varying Transform (SVT). The basic idea of SVT is that we do not restrict the transform coding inside normal block b...
Cixun Zhang, Kemal Ugur, Jani Lainema, Moncef Gabb...
ICIP
2008
IEEE
13 years 11 months ago
Decoder side motion vector derivation for inter frame video coding
In this paper, a decoder side motion vector derivation scheme for inter frame video coding is proposed. Using a template matching algorithm, motion information is derived at the d...
Steffen Kamp, Michael Evertz, Mathias Wien
IAJIT
2008
201views more  IAJIT 2008»
13 years 4 months ago
Implementation of a Novel Efficient Multiwavelet Based Video Coding Algorithm
: The recent explosion in digital video storage and delivery has presented strong motivation for high performance video compression solutions. An efficient video compression techni...
Sudhakar Radhakrishnan, Jayaraman Subramaniam