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    ITC
    1996
    IEEE
    127views Hardware» more  ITC 1996»
    Altering a Pseudo-Random Bit Sequence for Scan-Based BIST
    13 years 8 months ago
    Altering a Pseudo-Random Bit Sequence for Scan-Based BIST
    Download  crc.stanford.edu
    This paper presents a low-overhead scheme for built-in self-test of circuits with scan. Complete (100%) fault coverage is obtained without modifying the function logic and without...
    Nur A. Touba, Edward J. McCluskey
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    ET
    2002
    111views more  ET 2002»
    Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST
    13 years 4 months ago
    Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST
    Download  www.date.uni-paderborn.de
    In this paper a novel architecture for scan-based mixed mode BIST is presented. To reduce the storage requirements for the deterministic patterns it relies on a two-dimensional co...
    Huaguo Liang, Sybille Hellebrand, Hans-Joachim Wun...
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