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IJON
2007
118views more  IJON 2007»
13 years 5 months ago
Low power CMOS electronic central pattern generator design for a biomimetic underwater robot
— This paper, presents a feasability study of a central pattern generator-based analog controller for an autonomous robot. The operation of a neuronal circuit formed of electroni...
Young-Jun Lee, Jihyun Lee, Kyung Ki Kim, Yong-Bin ...
ECCTD
2011
72views more  ECCTD 2011»
12 years 5 months ago
Managing variability for ultimate energy efficiency
⎯ Technology scaling is in the era where the chip performance is constrained by its power dissipation. Although the power limits vary with the application domain, they dictate th...
Borivoje Nikolic
VTS
2005
IEEE
102views Hardware» more  VTS 2005»
13 years 10 months ago
Design of Adaptive Nanometer Digital Systems for Effective Control of Soft Error Tolerance
Nanometer circuits are highly susceptible to soft errors generated by alpha-particle or atmospheric neutron strikes to circuit nodes. The reasons for the high susceptibility are t...
Abdulkadir Utku Diril, Yuvraj Singh Dhillon, Abhij...
DAC
2011
ACM
12 years 5 months ago
Rethinking memory redundancy: optimal bit cell repair for maximum-information storage
SRAM design has been a major challenge for nanoscale manufacturing technology. We propose a new bit cell repair scheme for designing maximum-information memory system (MIMS). Unli...
Xin Li
VLSID
2009
IEEE
155views VLSI» more  VLSID 2009»
14 years 5 months ago
Unified Challenges in Nano-CMOS High-Level Synthesis
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
Saraju P. Mohanty