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EH
2004
IEEE
117views Hardware» more  EH 2004»
13 years 9 months ago
Multi-objective Optimization of a Parameterized VLIW Architecture
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
ICCD
2005
IEEE
159views Hardware» more  ICCD 2005»
13 years 11 months ago
Architectural-Level Fault Tolerant Computation in Nanoelectronic Processors
Nanoelectronic devices are expected to have extremely high and variable fault rates; thus future processor architectures based on these unreliable devices need to be built with fa...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
DAC
2005
ACM
14 years 6 months ago
Efficient fingerprint-based user authentication for embedded systems
User authentication, which refers to the process of verifying the identity of a user, is becoming an important security requirement in various embedded systems. While conventional...
Pallav Gupta, Srivaths Ravi, Anand Raghunathan, Ni...
CASES
2008
ACM
13 years 7 months ago
VESPA: portable, scalable, and flexible FPGA-based vector processors
While soft processors are increasingly common in FPGAbased embedded systems, it remains a challenge to scale their performance. We propose extending soft processor instruction set...
Peter Yiannacouras, J. Gregory Steffan, Jonathan R...
FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
13 years 12 months ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski