89 search results - page 3 / 18 » An Architecture for Combined Test Data Compression and Abort... |
ICCAD
2007
IEEE
13 years 8 months ago
2007
IEEE
Abstract-- In this paper, we propose a novel test data compression technique named CacheCompress, which combines selective encoding and dynamic dictionary based encoding. Depending...
VTS
2006
IEEE
2006
IEEE
Combining Linear and Non-Linear Test Vector Compression Using Correlation-Based Rectangular Encoding
13 years 11 months ago
A technique is presented here for improving the compression achieved with any linear decompressor by adding a small non-linear decoder that exploits bit-wise and pattern-wise corr...
ISVLSI
2008
IEEE
13 years 11 months ago
2008
IEEE
Re-using the network in a NoC-based system as a test access mechanism is an attractive solution as pointed out by several authors. As a consequence, testing of NoC-based SoCs is b...
VTS
2002
IEEE
13 years 9 months ago
2002
IEEE
Run-length codes and their variants have recently been shown to be very effective for compressing system-on-achip (SOC) test data. In this paper, we analyze the Golomb code, the c...
DAC
2005
ACM
13 years 6 months ago
2005
ACM
This paper presents a new test response compaction technique with any number of unknown logic values (X’s) in the test response bits. The technique leverages an X-tolerant respo...