Sciweavers

    14 search results - page 1 / 3
    » An Architecture for Fail-Silent Operation of FPGAs and Confi...
    Sort
    View
    CSREAESA
    2006
    154views Embedded Systems» more  CSREAESA 2006»
    An Architecture for Fail-Silent Operation of FPGAs and Configurable SoCs
    13 years 6 months ago
    An Architecture for Fail-Silent Operation of FPGAs and Configurable SoCs
    Download  ww1.ucmss.com
    Lee Lerner, Charles E. Stroud
    claim paper
    Read More »
    DAC
    2006
    ACM
    110views Computer Architecture» more  DAC 2006»
    A reconfigurable design-for-debug infrastructure for SoCs
    13 years 10 months ago
    A reconfigurable design-for-debug infrastructure for SoCs
    Download  videos.dac.com
    In this paper we present a Design-for-Debug (DFD) reconfigurable infrastructure for SoCs to support at-speed in-system functional debug. A distributed reconfigurable fabric insert...
    Miron Abramovici, Paul Bradley, Kumar N. Dwarakana...
    claim paper
    Read More »
    TVLSI
    2008
    105views more  TVLSI 2008»
    Robust Concurrent Online Testing of Network-on-Chip-Based SoCs
    13 years 4 months ago
    Robust Concurrent Online Testing of Network-on-Chip-Based SoCs
    Download  courses.cs.tamu.edu
    Lifetime concerns for complex systems-on-a-chip (SoC) designs due to decreasing levels in reliability motivate the development of solutions to ensure reliable operation. A precurso...
    Praveen Bhojwani, Rabi N. Mahapatra
    claim paper
    Read More »
    DAC
    2002
    ACM
    111views Computer Architecture» more  DAC 2002»
    Component-based design approach for multicore SoCs
    14 years 5 months ago
    Component-based design approach for multicore SoCs
    Download  www.cs.indiana.edu
    This paper presents a high-level component-based methodology and design environment for application-specific multicore SoC architectures. Component-based design provides primitive...
    Ahmed Amine Jerraya, Amer Baghdadi, Damien Lyonnar...
    claim paper
    Read More »
    VLSID
    2006
    IEEE
    169views VLSI» more  VLSID 2006»
    A Hybrid SoC Interconnect with Dynamic TDMA-Based Transaction-Less Buses and On-Chip Networks
    14 years 5 months ago
    A Hybrid SoC Interconnect with Dynamic TDMA-Based Transaction-Less Buses and On-Chip Networks
    Download  eref.uqu.edu.sa
    The two dominant architectural choices for implementing efficient communication fabrics for SoC's have been transaction-based buses and packet-based Networks-onChip (NoC). Bo...
    Thomas D. Richardson, Chrysostomos Nicopoulos, Don...
    claim paper
    Read More »
    Explore & Download
    Proceedings Preprints Top 5 Ranked Papers Publications Books Software Tutorials Presentations Lectures Notes Datasets
    Productivity Tools
    International On-screen Keyboard Graphical Social Symbols OCR Text Recognition CSS3 Style Generator Web Page to PDF Web Page to Image PDF Split PDF Merge Latex Equation Editor Sci2ools
    Document Tools
    PDF to Text PDF to Postscript PDF to Thumbnails Excel to PDF Word to PDF Postscript to PDF PowerPoint to PDF Latex to Word Repair Corrupted PDF
    Image Tools
    JPG to PS JPG to PDF Extract Images from PDF Image Converter
    Sciweavers
    About Community Cookies Privacy Policy Terms of Use

    Copyright © Sciweavers LLC, 2009-2024, USA.