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TC
2011
12 years 12 months ago
An Architecture for Fault-Tolerant Computation with Stochastic Logic
—Mounting concerns over variability, defects and noise motivate a new approach for digital circuitry: stochastic logic, that is to say, logic that operates on probabilistic signa...
Weikang Qian, Xin Li, Marc D. Riedel, Kia Bazargan...
DSN
2007
IEEE
13 years 11 months ago
Fault Tolerant Approaches to Nanoelectronic Programmable Logic Arrays
Programmable logic arrays (PLA), which can implement arbitrary logic functions in a two-level logic form, are promising as platforms for nanoelectronic logic due to their highly r...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
DAC
2009
ACM
14 years 6 months ago
Computing bounds for fault tolerance using formal techniques
Continuously shrinking feature sizes result in an increasing susceptibility of circuits to transient faults, e.g. due to environmental radiation. Approaches to implement fault tol...
André Sülflow, Görschwin Fey, Rol...
IPPS
1999
IEEE
13 years 9 months ago
Dependability Evaluation of Fault Tolerant Distributed Industrial Control Systems
Modern distributed industrial control systems need improvements in their dependability. In this paper we study the dependability of a fault tolerant distributed industrial control ...
José Carlos Campelo, Pedro Yuste, Francisco...
ISVLSI
2003
IEEE
118views VLSI» more  ISVLSI 2003»
13 years 10 months ago
Networks-On-Chip: The Quest for On-Chip Fault-Tolerant Communication
In this paper, we discuss the possibility of achieving onchip fault-tolerant communication based on a new communication paradigm called stochastic communication. Specifically, for...
Radu Marculescu