7 search results - page 1 / 2 » An Efficient Algorithm for Low Power Pass Transistor Logic S... |
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
In this paper, we address the problem of power dissipation minimization in combinational circuits implemented using pass transistor logic (PTL). We transform the problem of power ...
DATE
2000
IEEE
13 years 9 months ago
2000
IEEE
Pass Transistor Logic has attracted more and more interest during last years, since it has proved to be an attractive alternative to static CMOS designs with respect to area, perf...
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
Compare CMOS Logic with Pass-Transistor Logic, a question was raised in our mind: "Does any rule exist that contains all good?" This paper reveals novel logic synthesis ...
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...
ASPDAC
2004
ACM
13 years 10 months ago
2004
ACM
— In many verification tools methods for functional simulation based on reduced ordered Binary Decision Diagrams (BDDs) are used. The evaluation time for a BDD can be crucial an...