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TVLSI
2010
13 years 1 days ago
LOPASS: A Low-Power Architectural Synthesis System for FPGAs With Interconnect Estimation and Optimization
In this paper, we present a low-power architectural synthesis system (LOPASS) for field-programmable gate-array (FPGA) designs with interconnect power estimation and optimization. ...
Deming Chen, Jason Cong, Yiping Fan, Lu Wan
TVLSI
2008
106views more  TVLSI 2008»
13 years 5 months ago
New Non-Volatile Memory Structures for FPGA Architectures
A new set of programmable elements (PEs) using a new non-volatile device for use with routing switches and logical elements within a field-programmable gate array (FPGA) is describ...
David Choi, Kyu Choi, John D. Villasenor