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» An Efficient Path Delay Fault Coverage Estimator
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DAC
1994
ACM
14 years 1 months ago
An Efficient Path Delay Fault Coverage Estimator
Keerthi Heragu, Michael L. Bushnell, Vishwani D. A...
DATE
2002
IEEE
94views Hardware» more  DATE 2002»
14 years 2 months ago
Exact Grading of Multiple Path Delay Faults
The problem of fault grading for multiple path delay faults is studied and a method of obtaining the exact coverage is presented. The faults covered are represented and manipulate...
Saravanan Padmanaban, Spyros Tragoudas
ICCAD
2003
IEEE
127views Hardware» more  ICCAD 2003»
14 years 6 months ago
Layout-Aware Scan Chain Synthesis for Improved Path Delay Fault Coverage
Path delay fault testing becomes increasingly important due to higher clock rates and higher process variability caused by shrinking geometries. Achieving high-coverage path delay...
Puneet Gupta, Andrew B. Kahng, Ion I. Mandoiu, Pun...
IFIP
2001
Springer
14 years 1 months ago
Random Adjacent Sequences: An Efficient Solution for Logic BIST
: High defect coverage requires good coverage of different fault types. In this paper, we present a comprehensive test vector generation technique for BIST, called Random Single In...
René David, Patrick Girard, Christian Landr...
VLSID
1996
IEEE
110views VLSI» more  VLSID 1996»
14 years 1 months ago
On test coverage of path delay faults
W epropose a coverage metric and a two-pass test generation method for path delay faults in combinational logic circuits. The coverage is measured for each line with a rising and ...
Ananta K. Majhi, James Jacob, Lalit M. Patnaik, Vi...