In this paper, we describe an accurate metric (perimeter-degree) for measuring interconnection complexity and effective use of it for controlling congestion in a multilevel framew...
Navaratnasothie Selvakkumaran, Phiroze N. Parakh, ...
This paper studies the optimality, scalability and stability of stateof-the-art partitioning and placement algorithms. We present algorithms to construct two classes of benchmarks...
FPGA application developers often attempt to use pipelining, Cslowing and retiming to improve the performance of their designs. Unfortunately, such registered netlists present a f...
We propose in this paper a multilevel full-chip routing algorithm that improves testability and diagnosability, manufacturability, and signal integrity for yield enhancement. Two ...
Boolean functions are fundamental to synthesis and verification of digital logic, and compact representations of Boolean functions have great practical significance. Popular repre...