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ATS
2009
IEEE
127views Hardware» more  ATS 2009»
13 years 10 months ago
On the Generation of Functional Test Programs for the Cache Replacement Logic
Caches are crucial components in modern processors (both stand-alone or integrated into SoCs) and their test is a challenging task, especially when addressing complex and high-fre...
Wilson J. Perez, Danilo Ravotto, Edgar E. Sá...
ICSE
2003
IEEE-ACM
14 years 5 months ago
Modular Verification of Software Components in C
We present a new methodology for automatic verification of C programs against finite state machine specifications. Our approach is compositional, naturally enabling us to decompos...
Sagar Chaki, Edmund M. Clarke, Alex Groce, Somesh ...
DATE
2004
IEEE
123views Hardware» more  DATE 2004»
13 years 9 months ago
On Concurrent Error Detection with Bounded Latency in FSMs
We discuss the problem of concurrent error detection (CED) with bounded latency in finite state machines (FSMs). The objective of this approach is to reduce the overhead of CED, a...
Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris
ASE
2005
137views more  ASE 2005»
13 years 5 months ago
Rewriting-Based Techniques for Runtime Verification
Techniques for efficiently evaluating future time Linear Temporal Logic (abbreviated LTL) formulae on finite execution traces are presented. While the standard models of LTL are i...
Grigore Rosu, Klaus Havelund
BMCBI
2011
13 years 9 days ago
A discriminative method for family-based protein remote homology detection that combines inductive logic programming and proposi
Background: Remote homology detection is a hard computational problem. Most approaches have trained computational models by using either full protein sequences or multiple sequenc...
Juliana S. Bernardes, Alessandra Carbone, Gerson Z...