33 search results - page 2 / 7 » An FPGA implementation and performance evaluation of the Ser... |
LPAR
2005
Springer
13 years 10 months ago
2005
Springer
Abstract. We discuss a collection of mechanized formal proofs of symmetric key block encryption algorithms (AES, MARS, Twofish, RC6, Serpent, IDEA, and TEA), performed in an imple...
ITCC
2005
IEEE
13 years 10 months ago
2005
IEEE
— This paper presents FPGA (Field Programmable Gate Array) implementations of ICEBERG, a block cipher designed for reconfigurable hardware implementations and presented at FSE 2...
ARC
2009
Springer
13 years 11 months ago
2009
Springer
As the need for information security increases in our everyday life, the job of encoding/decoding for secure information delivery becomes a critical issue in data network systems. ...
ISCAS
2008
IEEE
13 years 11 months ago
2008
IEEE
— In the present paper, we introduce high-performance hardware architectures for the 128-bit block cipher CLEFIA and evaluate their ASIC performances in comparison with the ISO/I...
DAC
2005
ACM
14 years 5 months ago
2005
ACM
This paper presents two novel and high performance hardware architectures, implemented in FPGA technology, for the KASUMI block cipher; this algorithm lies at the core of the conf...