7 search results - page 1 / 2 » An Infrastructure to Functionally Test Designs Generated by ... |
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
This paper presents an infrastructure to test the functionality of the specific architectures output by a highlevel compiler targeting dynamically reconfigurable hardware. It resu...
FCCM
2002
IEEE
13 years 9 months ago
2002
IEEE
This paper explores the implications of integrating flexible module generation into a compiler for FPGAs. The objective is to improve the programmabilityof FPGAs, or in other wor...
FPL
2004
Springer
13 years 10 months ago
2004
Springer
Abstract. High level modeling tools make it possible to synthesize a high performance FPGA design directly from a Simulink model. Accurate estimates of the FPGA resources required ...
FCCM
2007
IEEE
13 years 11 months ago
2007
IEEE
This paper proposes optimizations of the methods and parameters used in both mathematical approximation and hardware design for logarithmic number system (LNS) arithmetic. First, ...
CAI
2004
Springer
13 years 4 months ago
2004
Springer
A complete hardware implementation of an evolvable combinational unit for FPGAs is presented. The proposed combinational unit consisting of a virtual reconfigurable circuit and evo...