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DAC
2009
ACM
14 years 6 months ago
Fault models for embedded-DRAM macros
In this paper, we compare embedded-DRAM (eDRAM) testing to both SRAM testing and commodity-DRAM testing, since an eDRAM macro uses DRAM cells with an SRAM interface. We first star...
Ching-Yu Chin, Hao-Yu Yang, Mango Chia-Tso Chao, R...
VLSID
2002
IEEE
114views VLSI» more  VLSID 2002»
14 years 5 months ago
Embedded DRAM (eDRAM) Power-Energy Estimation for System-on-a-Chip (SoC) Applications
Embedded DRAM (eDRAM) power-energy estimation is presented for system-on-a-chip (SOC) applications. The main feature is the signal swing based analytic (SSBA) model, which improve...
Yong-Ha Park, Jeonghoon Kook, Hoi-Jun Yoo
ISCA
2000
IEEE
63views Hardware» more  ISCA 2000»
13 years 9 months ago
An embedded DRAM architecture for large-scale spatial-lattice computations
Spatial-lattice computations with finite-range interactions are an important class of easily parallelized computations. This class includes many simple and direct algorithms for ...
Norman Margolus
CSE
2009
IEEE
13 years 6 months ago
Efficient Translation of Algorithmic Kernels on Large-Scale Multi-cores
In this paper we present the design of a novel embedded processor architecture (which we call a
Amit Pande, Joseph Zambreno
SENSYS
2004
ACM
13 years 10 months ago
An analysis of a large scale habitat monitoring application
Habitat and environmental monitoring is a driving application for wireless sensor networks. We present an analysis of data from a second generation sensor networks deployed during...
Robert Szewczyk, Alan M. Mainwaring, Joseph Polast...