118 search results - page 1 / 24 » Analysis and modeling of CD variation for statistical static... |
ICCAD
2006
IEEE
14 years 1 months ago
2006
IEEE
Statistical static timing analysis (SSTA) has become a key method for analyzing the effect of process variation in aggressively scaled CMOS technologies. Much research has focused...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
SSTA has received a considerable amount of attention in recent years. However, it is a general rule that any approach can only be as accurate as the underlying models. Thus, varia...
ICCAD
2007
IEEE
14 years 1 months ago
2007
IEEE
While the increasing need for addressing process variability in sub-90nm VLSI technologies has sparkled a large body of statistical timing and optimization research, the realizati...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
— Statistical static timing analysis deals with the increasing variations in manufacturing processes to reduce the pessimism in the worst case timing analysis. Because of the cor...
ASPDAC
2009
ACM
13 years 11 months ago
2009
ACM
Abstract— Double patterning lithography (DPL) is in current production for memory products, and is widely viewed as inevitable for logic products at the 32nm node. DPL decomposes...