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» Analysis of Hardware Acceleration in Reconfigurable Embedded...
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IPPS
2006
IEEE
13 years 10 months ago
Mapping DSP applications on processor systems with coarse-grain reconfigurable hardware
In this paper, we present performance results from mapping five real-world DSP applications on an embedded system-on-chip that incorporates coarse-grain reconfigurable logic with ...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...
FPT
2005
IEEE
181views Hardware» more  FPT 2005»
13 years 10 months ago
Hardware-Accelerated SSH on Self-Reconfigurable Systems
The performance of security applications can be greatly improved by accelerating the cryptographic algorithms in hardware. In this paper, an implementation of the Secure Shell (SS...
Ivan Gonzalez, Francisco J. Gomez-Arribas, Sergio ...
ERSA
2008
103views Hardware» more  ERSA 2008»
13 years 6 months ago
A Hardware Accelerator for k-th Nearest Neighbor Thinning
This paper presents an accelerator for k-th nearest neighbor thinning, a run time intensive algorithmic kernel used in recent multi-objective optimizers. We discuss the thinning al...
Tobias Schumacher, Robert Meiche, Paul Kaufmann, E...
DATE
2008
IEEE
156views Hardware» more  DATE 2008»
13 years 11 months ago
Transparent Reconfigurable Acceleration for Heterogeneous Embedded Applications
Embedded systems are becoming increasingly complex. Besides the additional processing capabilities, they are characterized by high diversity of computational models coexisting in ...
Antonio Carlos Schneider Beck, Mateus B. Rutzig, G...
FCCM
2005
IEEE
151views VLSI» more  FCCM 2005»
13 years 10 months ago
Accelerating Applications by Mapping Critical Kernels on Coarse-Grain Reconfigurable Hardware in Hybrid Systems
In this paper, we propose a method for speeding-up applications by partitioning them between the reconfigurable hardware blocks of different granularity and mapping critical parts...
Michalis D. Galanis, Grigoris Dimitroulakos, Costa...