We propose a gate resizing method for delay and power optimization that is based on statistical static timing analysis. Our method focuses on the component of timing uncertainties...
— An effectively designed and efficiently used memory hierarchy, composed of scratch-pads or cache, is seen today as the key to obtaining energy and performance gains in data-do...
This paper describes in detail the combination of NLP methods applied to the treatment of logic forms in the topic processing and statistical methods applied to the search engine ...
In recent years, the use of performance measures for transit planning and operations has gained a great deal of attention, particularly as transit agencies are required to provide ...
We revisit memory hierarchy design viewing memory as an inter-operation communication agent. This perspective leads to the development of novel methods of performing inter-operati...