37 search results - page 2 / 8 » Application of deterministic logic BIST on industrial circui... |
ITC
1996
IEEE
13 years 9 months ago
1996
IEEE
This paper presents a low-overhead scheme for built-in self-test of circuits with scan. Complete (100%) fault coverage is obtained without modifying the function logic and without...
IJCNN
2000
IEEE
13 years 9 months ago
2000
IEEE
This paper shows an application in the field of Electronic CAD of the Selfish Gene algorithm, an evolutionary algorithm based on a recent interpretation of the Darwinian theory. Te...
ETS
2011
IEEE
12 years 5 months ago
2011
IEEE
—In-field diagnosability of electronic components in larger systems such as automobiles becomes a necessity for both customers and system integrators. Traditionally, functional ...
DFT
2002
IEEE
13 years 10 months ago
2002
IEEE
Many digital circuits have constraints on the logic values a set of signal lines can have. In this paper, we present two new techniques for detecting the illegal combinations of l...
VTS
2003
IEEE
13 years 10 months ago
2003
IEEE
Reseeding is used to improve fault coverage in pseudo-random testing. Most of the work done on reseeding is based on storing the seeds in an external tester. Besides its high cost...