Modern digital signal processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many appl...
B. Neumann, Thorsten von Sydow, Holger Blume, Tobi...
This paper presents a highly efficient processor design methodology based on the LISA 2.0 language. Typically the architecture design phase is dominated by an iterative processor ...
Andreas Hoffmann, Frank Fiedler, Achim Nohl, Suren...
A large body of research literature has focused on improving the performance of longest prefix match IP-lookup. More recently, embedded memory based architectures have been propos...
Sailesh Kumar, Michela Becchi, Patrick Crowley, Jo...
Power integrity simulation for system-on-package (SoP) based modules is a crucial bottleneck in the SoP design flow. In this paper, the multi-layer finite difference method (M-FDM...
Krishna Bharath, Ege Engin, Madhavan Swaminathan, ...
- The use of reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such cores are being used for their flexibility, powerful functionality and low ...