39 search results - page 6 / 8 » Architectural Modifications to Enhance the Floating-Point Pe... |
CASES
2008
ACM
13 years 7 months ago
2008
ACM
Various commercial programmable compute platforms have their processor architecture enhanced with field-programmable gate arrays (FPGAs). In a common usage scenario, an applicatio...
DAC
2007
ACM
14 years 6 months ago
2007
ACM
This work is motivated by the strong demand of reliability enhancement over flash memory. Our objective is to improve the endurance of flash memory with limited overhead and witho...
ISLPED
2003
ACM
13 years 11 months ago
2003
ACM
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
FCCM
2005
IEEE
13 years 11 months ago
2005
IEEE
When designing systems-on-a-chip (SoCs), a unique opportunity exists to generate custom FPGA architectures that are specific to the application domain in which the device will be ...
ERSA
2008
13 years 7 months ago
2008
Partial reconfiguration (PR) reveals many opportunities for integration into FPGA design for potential system optimizations such as reduced area, increased performance, and increa...