13 search results - page 1 / 3 » Area delay estimation for digital signal processor cores |
ASPDAC
2001
ACM
13 years 8 months ago
2001
ACM
Hardware/software partitioning is one of the key processes in a hardware/software cosynthesis system for digital signal processor cores. In hardware/software partitioning, area and...
ISCAPDCS
2008
13 years 6 months ago
2008
This article presents the results of a research in applying modern Graphics Processing Units in the field of telecommunications. The most recent Wireless Local Area Network protoc...
ICCAD
2003
IEEE
14 years 1 months ago
2003
IEEE
Transient Signal Analysis (TSA) is a parametric device testing technique based on the analysis of dynamic (transient) current (iDDT) drawn by the core logic from the power supply ...
FPL
2005
Springer
13 years 10 months ago
2005
Springer
As the logic capacity of FPGA increases, there has been a corresponding increase in the variety of FPGA building blocks. From a mere collection of the conventional logic blocks, F...
SIPS
2006
IEEE
13 years 11 months ago
2006
IEEE
Abstract— This paper presents a design environment for efficiently generating application-specific Intellectual Property (IP) cores for system level signal processing algorithm...