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» Asynchronous circuit design on reconfigurable devices
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ISMVL
2010
IEEE
209views Hardware» more  ISMVL 2010»
13 years 10 months ago
Secure Design Flow for Asynchronous Multi-valued Logic Circuits
—The purpose of secure devices such as smartcards is to protect secret information against software and hardware attacks. Implementation of the appropriate protection techniques ...
Ashur Rafiev, Julian P. Murphy, Alexandre Yakovlev
CHES
2006
Springer
205views Cryptology» more  CHES 2006»
13 years 8 months ago
Automated Design of Cryptographic Devices Resistant to Multiple Side-Channel Attacks
Balanced dynamic dual-rail gates and asynchronous circuits have been shown, if implemented correctly, to have natural and efficient resistance to side-channel attacks. Despite thei...
Konrad J. Kulikowski, Alexander B. Smirnov, Alexan...
FPGA
2007
ACM
114views FPGA» more  FPGA 2007»
13 years 11 months ago
Design of a logic element for implementing an asynchronous FPGA
A reconfigurable logic element (LE) is developed for use in constructing a NULL Convention Logic (NCL) FPGA. It can be configured as any of the 27 fundamental NCL gates, including...
Scott C. Smith
ICES
2005
Springer
111views Hardware» more  ICES 2005»
13 years 10 months ago
Evolvable Hardware System at Extreme Low Temperatures
This paper describes circuit evolutionary experiments at extreme low temperatures, including the test of all system components at this extreme environment (EE). In addition to hard...
Ricardo Salem Zebulum, Adrian Stoica, Didier Keyme...
CHES
2003
Springer
100views Cryptology» more  CHES 2003»
13 years 10 months ago
Security Evaluation of Asynchronous Circuits
Abstract. Balanced asynchronous circuits have been touted as a superior replacement for conventional synchronous circuits. To assess these claims, we have designed, manufactured an...
Jacques J. A. Fournier, Simon W. Moore, Huiyun Li,...