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» Automated Bus Generation for Multiprocessor SoC Design
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DATE
2003
IEEE
145views Hardware» more  DATE 2003»
13 years 10 months ago
Automated Bus Generation for Multiprocessor SoC Design
The performance of a system, especially a multiprocessor system, heavily depends upon the efficiency of its bus architecture. This paper presents a methodology to generate a custo...
Kyeong Keol Ryu, Vincent John Mooney
DATE
2004
IEEE
154views Hardware» more  DATE 2004»
13 years 8 months ago
Fast Exploration of Parameterized Bus Architecture for Communication-Centric SoC Design
For successful SoC design, efficient and scalable communication architecture is crucial. Some bus interconnects now provide configurable structures to meet this requirement of an ...
Chulho Shin, Young-Taek Kim, Eui-Young Chung, Kyu-...
ASPDAC
2006
ACM
169views Hardware» more  ASPDAC 2006»
13 years 11 months ago
A real-time and bandwidth guaranteed arbitration algorithm for SoC bus communication
– In shared SoC bus systems, arbiters are usually adopted to solve bus contentions with various kinds of arbitration algorithms. We propose an arbitration algorithm, RT_lottery, ...
Chien-Hua Chen, Geeng-Wei Lee, Juinn-Dar Huang, Ji...
ISSS
2002
IEEE
126views Hardware» more  ISSS 2002»
13 years 10 months ago
Unifying Memory and Processor Wrapper Architecture in Multiprocessor SoC Design
In this paper, we present a new methodology for application specific multiprocessor system-on-chip design. This approach facilitates the integration of existing components with th...
Ahmed Amine Jerraya, Damien Lyonnard, Samy Meftali...
ICCAD
2008
IEEE
109views Hardware» more  ICCAD 2008»
14 years 1 months ago
Verifying external interrupts of embedded microprocessor in SoC with on-chip bus
—The microprocessor verification challenge becomes higher in the on-chip bus (OCB) than in the unit-level. Especially for the external interrupts, since they interface with othe...
Fu-Ching Yang, Jing-Kun Zhong, Ing-Jer Huang