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GLVLSI
2008
IEEE
150views VLSI» more  GLVLSI 2008»
13 years 5 months ago
Using unsatisfiable cores to debug multiple design errors
Due to the increasing complexity of today's circuits a high degree of automation in the design process is mandatory. The detection of faults and design errors is supported qu...
André Sülflow, Görschwin Fey, Rod...
DAC
2000
ACM
14 years 6 months ago
Efficient error detection, localization, and correction for FPGA-based debugging
John Lach, William H. Mangione-Smith, Miodrag Potk...
TCAD
2010
154views more  TCAD 2010»
13 years 5 days ago
Automated Design Debugging With Maximum Satisfiability
As contemporary VLSI designs grow in complexity, design debugging has rapidly established itself as one of the largest bottlenecks in the design cycle today. Automated debug soluti...
Yibin Chen, Sean Safarpour, João Marques-Si...
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
13 years 3 months ago
AVF Stressmark: Towards an Automated Methodology for Bounding the Worst-Case Vulnerability to Soft Errors
Soft error reliability is increasingly becoming a first-order design concern for microprocessors, as a result of higher transistor counts, shrinking device geometries and lowering ...
Arun A. Nair, Lizy Kurian John, Lieven Eeckhout