27 search results - page 3 / 6 » Automated microprocessor stressmark generation |
MTV
2006
IEEE
13 years 11 months ago
2006
IEEE
Simulation-based validation of the current industrial processors typically use huge number of test programs generated at instruction set architecture (ISA) level. However, archite...
DAC
2007
ACM
14 years 6 months ago
2007
ACM
The drive for low-power, high performance computation coupled with the extremely high design costs for ASIC designs, has driven a number of designers to try to create a flexible, ...
DAC
2000
ACM
13 years 10 months ago
2000
ACM
Datapath design is one of the most critical elements in the design of a high performance microprocessor. However datapath design is typically done manually, and is often custom st...
TVLSI
2008
13 years 5 months ago
2008
We present a Mutation-based Validation Paradigm (MVP) technology that can handle complete high-level microprocessor implementations and is based on explicit design error modeling, ...
DAC
2003
ACM
14 years 6 months ago
2003
ACM
We describe a technique for verifying that a hardware design correctly implements a protocol-level formal specification. Simulation steps are translated to protocol state transiti...