Sciweavers

20 search results - page 2 / 4
» Automatic Formal Synthesis of Hardware from Higher Order Log...
Sort
View
ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
14 years 1 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna
AMAI
2004
Springer
13 years 10 months ago
Using Automatic Case Splits and Efficient CNF Translation to Guide a SAT-solver when Formally Verifying Out-Of-Order Processors
The paper integrates automatically generated case-splitting expressions, and an efficient translation to CNF, in order to formally verify an out-of-order superscalar processor havi...
Miroslav N. Velev
DATE
2000
IEEE
124views Hardware» more  DATE 2000»
13 years 9 months ago
On the Generation of Multiplexer Circuits for Pass Transistor Logic
Pass Transistor Logic has attracted more and more interest during last years, since it has proved to be an attractive alternative to static CMOS designs with respect to area, perf...
Christoph Scholl, Bernd Becker
FTRTFT
1998
Springer
13 years 9 months ago
On the Need for Practical Formal Methods
A controversial issue in the formal methods community is the degree to which mathematical sophistication and theorem proving skills should be needed to apply a formal method. A fun...
Constance L. Heitmeyer
VLSID
2008
IEEE
122views VLSI» more  VLSID 2008»
14 years 5 months ago
A Module Checking Based Converter Synthesis Approach for SoCs
Protocol conversion involves the use of a converter to control communication between two or more protocols such that desired system-level specifications can be satisfied. We invest...
Roopak Sinha, Partha S. Roop, Samik Basu