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ASAP
2005
IEEE
121views Hardware» more  ASAP 2005»
13 years 11 months ago
Using TLM for Exploring Bus-based SoC Communication Architectures
As billion transistor System-on-chips (SoC) become commonplace and design complexity continues to increase, designers are faced with the daunting task of meeting escalating design...
Sudeep Pasricha, Mohamed Ben-Romdhane
ICCAD
2008
IEEE
109views Hardware» more  ICCAD 2008»
14 years 2 months ago
Verifying external interrupts of embedded microprocessor in SoC with on-chip bus
—The microprocessor verification challenge becomes higher in the on-chip bus (OCB) than in the unit-level. Especially for the external interrupts, since they interface with othe...
Fu-Ching Yang, Jing-Kun Zhong, Ing-Jer Huang
TVLSI
2010
13 years 2 days ago
Variation-Aware System-Level Power Analysis
Abstract-- The operational characteristics of integrated circuits based on nanoscale semiconductor technology are expected to be increasingly affected by variations in the manufact...
Saumya Chandra, Kanishka Lahiri, Anand Raghunathan...
FDL
2004
IEEE
13 years 9 months ago
Real-Time Operating System Services for Realistic SystemC Simulation Models of Embedded Systems
gn process of embedded systems moves currently towards higher levels of abstraction. As a consequence, a need arises for an early and realistic assessment of system level design d...
P. Hastono, Stephan Klaus, Sorin A. Huss
DATE
2006
IEEE
133views Hardware» more  DATE 2006»
13 years 11 months ago
Automatic generation of operation tables for fast exploration of bypasses in embedded processors
Customizing the bypasses in an embedded processor uncovers valuable trade-offs between the power, performance and the cost of the processor. Meaningful exploration of bypasses re...
Sanghyun Park, Eugene Earlie, Aviral Shrivastava, ...