302 search results - page 1 / 61 » Automatic Verification of Timed Circuits |
CAV
1994
Springer
13 years 9 months ago
1994
Springer
This paper presents a new formalism and a new algorithm for verifying timed circuits. The formalism, called orbital nets, allows hierarchical verification based on abehavioralseman...
ASPDAC
2004
ACM
13 years 9 months ago
2004
ACM
When time is incorporated in the specification of discrete systems, the complexity of verification grows exponentially. When the temporal behavior is specified with symbols, the ve...
CAV
2001
Springer
13 years 9 months ago
2001
Springer
ICCD
1999
IEEE
13 years 9 months ago
1999
IEEE
ions", in IEEE Transactions on CAD of VLSI, 25(3):403-412, March, 2006. , E. Mercer, C. Myers, "Modular Verification of Timed Systems Using Automatic Abstraction" in...
ATS
2001
IEEE
13 years 8 months ago
2001
IEEE
This paper develops a framework to support trace theoretic verification of timed circuits and systems. A theoretical foundation for classifying timed traces as either successes or...