95 search results - page 2 / 19 » Automatic abstraction and verification of verilog models |
VLSID
2007
IEEE
14 years 6 months ago
2007
IEEE
We present a technique for automatic verification of pipelined microprocessors using model checking. Antecedent conditioned slicing is an efficient abstraction technique for hardw...
SIES
2010
IEEE
13 years 3 months ago
2010
IEEE
Abstract--Many heterogeneous embedded systems, for example industrial automation and automotive applications, require hard-real time constraints to be exhaustively verified - which...
DATE
2004
IEEE
13 years 9 months ago
2004
IEEE
In this paper, we present a technique to design and verify the Look-Aside (LA-1) Interface standard used in network processors. Our design flow includes several refinements starti...
DAC
2008
ACM
14 years 6 months ago
2008
ACM
ng Automatic Abstraction Refinement for Generalized Symbolic Trajectory Evaluation Yan Chen Dept. of Computer Science Portland State University Portland, OR, 97207 chenyan@cs.pdx.e...
DAC
1996
ACM
13 years 9 months ago
1996
ACM
We reduce the state explosion problem in automatic verification of finite-state systems by automatically collapsing subgraphs of the aph into abstract states. The key idea of the ...